Design the common-gate amplifier of the provided circuit image to have an input impedance of approximately $50 \Omega$ using the $0.18-\mu \mathrm{m}$ CMOS devices in Table 1.5 with $\mathrm{I}_{\text {bias }}=100 \mu \mathrm{~A},(\mathrm{~W} / \mathrm{L})_3=2 \mu \mathrm{~m} / 0.2 \mu \mathrm{~m}$.